Design and Implementation of a Low-Cost Multi-channel Coherent Software Defined Radio Receiver for Educational and Amateur Radio Use Integration internship

Abstract

Current coherent software defined radio receivers, although on a path towards affordability for amateur radio and educational use, still have major down sides such as low bandwidth, hard to calibrate architectures, low channel count or high prices. Reviewing the state of the art in the field reveals that reusing mass produced commodity hardware by working around its intrinsic limitations is a viable path towards an affordable, high channel count, medium bandwidth coherent receiver. This masters thesis investigates the design of such a receiver using tuner ICs originally meant for low cost digital television receivers and a recently released high channel count ADC. Due to each tuner having its own local oscillator and phase locked loop, an onboard phase reference is added with the option of switching it into the receive path for auto-calibration. Before the full receiver is assembled, various subsystems are tested in advance to make sure they will perform adequately. The results shows that the phase reference splitter required for auto-calibration is able to maintain under 1% phase difference between its outputs over the entire frequency range of the receiver. It is also demonstrated that the power supply has the required accuracy and low ripple noise. Some mistakes were found in the design such as an incorrect capacitor in the power supply, an incorrect resistors in the tuner supporting circuitry and incorrect supply sequencing for the clock generator but all issues were easily resolved. Single channel reception was demonstrated showing that each channel on its own is a capable receiver with good sensitivity. Due to time constraints, mutli-channel coherent reception has not yet been demonstrated, but the currently obtained results do not indicate anything that would preclude the full system from working as intented.